1 // Copyright 2017 Google Inc.
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
7 // http://www.apache.org/licenses/LICENSE-2.0
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
15 #include "cpuinfo_x86.h"
16 #include "internal/bit_utils.h"
17 #include "internal/cpuid_x86.h"
22 static const Leaf kEmptyLeaf;
24 static Leaf SafeCpuId(uint32_t max_cpuid_leaf, uint32_t leaf_id) {
25 if (leaf_id <= max_cpuid_leaf) {
26 return CpuId(leaf_id);
34 #define MASK_MASKREG 0x20
35 #define MASK_ZMM0_15 0x40
36 #define MASK_ZMM16_31 0x80
38 static bool HasMask(uint32_t value, uint32_t mask) {
39 return (value & mask) == mask;
42 // Checks that operating system saves and restores xmm registers during context
44 static bool HasXmmOsXSave(uint32_t xcr0_eax) {
45 return HasMask(xcr0_eax, MASK_XMM);
48 // Checks that operating system saves and restores ymm registers during context
50 static bool HasYmmOsXSave(uint32_t xcr0_eax) {
51 return HasMask(xcr0_eax, MASK_XMM | MASK_YMM);
54 // Checks that operating system saves and restores zmm registers during context
56 static bool HasZmmOsXSave(uint32_t xcr0_eax) {
57 return HasMask(xcr0_eax, MASK_XMM | MASK_YMM | MASK_MASKREG | MASK_ZMM0_15 |
61 static void SetVendor(const Leaf leaf, char* const vendor) {
62 *(uint32_t*)(vendor) = leaf.ebx;
63 *(uint32_t*)(vendor + 4) = leaf.edx;
64 *(uint32_t*)(vendor + 8) = leaf.ecx;
68 static int IsVendor(const Leaf leaf, const char* const name) {
69 const uint32_t ebx = *(const uint32_t*)(name);
70 const uint32_t edx = *(const uint32_t*)(name + 4);
71 const uint32_t ecx = *(const uint32_t*)(name + 8);
72 return leaf.ebx == ebx && leaf.ecx == ecx && leaf.edx == edx;
75 // Reference https://en.wikipedia.org/wiki/CPUID.
76 static void ParseCpuId(const uint32_t max_cpuid_leaf, X86Info* info) {
77 const Leaf leaf_1 = SafeCpuId(max_cpuid_leaf, 1);
78 const Leaf leaf_7 = SafeCpuId(max_cpuid_leaf, 7);
80 const bool have_xsave = IsBitSet(leaf_1.ecx, 26);
81 const bool have_osxsave = IsBitSet(leaf_1.ecx, 27);
82 const uint32_t xcr0_eax = (have_xsave && have_osxsave) ? GetXCR0Eax() : 0;
83 const bool have_sse_os_support = HasXmmOsXSave(xcr0_eax);
84 const bool have_avx_os_support = HasYmmOsXSave(xcr0_eax);
85 const bool have_avx512_os_support = HasZmmOsXSave(xcr0_eax);
87 const uint32_t family = ExtractBitRange(leaf_1.eax, 11, 8);
88 const uint32_t extended_family = ExtractBitRange(leaf_1.eax, 27, 20);
89 const uint32_t model = ExtractBitRange(leaf_1.eax, 7, 4);
90 const uint32_t extended_model = ExtractBitRange(leaf_1.eax, 19, 16);
92 X86Features* const features = &info->features;
94 info->family = extended_family + family;
95 info->model = (extended_model << 4) + model;
96 info->stepping = ExtractBitRange(leaf_1.eax, 3, 0);
98 features->smx = IsBitSet(leaf_1.ecx, 6);
99 features->cx16 = IsBitSet(leaf_1.ecx, 13);
100 features->aes = IsBitSet(leaf_1.ecx, 25);
101 features->f16c = IsBitSet(leaf_1.ecx, 29);
102 features->sgx = IsBitSet(leaf_7.ebx, 2);
103 features->bmi1 = IsBitSet(leaf_7.ebx, 3);
104 features->bmi2 = IsBitSet(leaf_7.ebx, 8);
105 features->erms = IsBitSet(leaf_7.ebx, 9);
106 features->vpclmulqdq = IsBitSet(leaf_7.ecx, 10);
108 if (have_sse_os_support) {
109 features->ssse3 = IsBitSet(leaf_1.ecx, 9);
110 features->sse4_1 = IsBitSet(leaf_1.ecx, 19);
111 features->sse4_2 = IsBitSet(leaf_1.ecx, 20);
114 if (have_avx_os_support) {
115 features->fma3 = IsBitSet(leaf_1.ecx, 12);
116 features->avx = IsBitSet(leaf_1.ecx, 28);
117 features->avx2 = IsBitSet(leaf_7.ebx, 5);
120 if (have_avx512_os_support) {
121 features->avx512f = IsBitSet(leaf_7.ebx, 16);
122 features->avx512cd = IsBitSet(leaf_7.ebx, 28);
123 features->avx512er = IsBitSet(leaf_7.ebx, 27);
124 features->avx512pf = IsBitSet(leaf_7.ebx, 26);
125 features->avx512bw = IsBitSet(leaf_7.ebx, 30);
126 features->avx512dq = IsBitSet(leaf_7.ebx, 17);
127 features->avx512vl = IsBitSet(leaf_7.ebx, 31);
128 features->avx512ifma = IsBitSet(leaf_7.ebx, 21);
129 features->avx512vbmi = IsBitSet(leaf_7.ecx, 1);
130 features->avx512vbmi2 = IsBitSet(leaf_7.ecx, 6);
131 features->avx512vnni = IsBitSet(leaf_7.ecx, 11);
132 features->avx512bitalg = IsBitSet(leaf_7.ecx, 12);
133 features->avx512vpopcntdq = IsBitSet(leaf_7.ecx, 14);
134 features->avx512_4vnniw = IsBitSet(leaf_7.edx, 2);
135 features->avx512_4vbmi2 = IsBitSet(leaf_7.edx, 3);
139 static const X86Info kEmptyX86Info;
141 X86Info GetX86Info(void) {
142 X86Info info = kEmptyX86Info;
143 const Leaf leaf_0 = CpuId(0);
144 const uint32_t max_cpuid_leaf = leaf_0.eax;
145 SetVendor(leaf_0, info.vendor);
146 if (IsVendor(leaf_0, "GenuineIntel") || IsVendor(leaf_0, "AuthenticAMD")) {
147 ParseCpuId(max_cpuid_leaf, &info);
152 #define CPUID(FAMILY, MODEL) (((FAMILY & 0xFF) << 8) | (MODEL & 0xFF))
154 X86Microarchitecture GetX86Microarchitecture(const X86Info* info) {
155 if (memcmp(info->vendor, "GenuineIntel", sizeof(info->vendor)) == 0) {
156 switch (CPUID(info->family, info->model)) {
157 case CPUID(0x06, 0x35):
158 case CPUID(0x06, 0x36):
159 // https://en.wikipedia.org/wiki/Bonnell_(microarchitecture)
160 return INTEL_ATOM_BNL;
161 case CPUID(0x06, 0x37):
162 case CPUID(0x06, 0x4C):
163 // https://en.wikipedia.org/wiki/Silvermont
164 return INTEL_ATOM_SMT;
165 case CPUID(0x06, 0x5C):
166 // https://en.wikipedia.org/wiki/Goldmont
167 return INTEL_ATOM_GMT;
168 case CPUID(0x06, 0x0F):
169 case CPUID(0x06, 0x16):
170 // https://en.wikipedia.org/wiki/Intel_Core_(microarchitecture)
172 case CPUID(0x06, 0x17):
173 case CPUID(0x06, 0x1D):
174 // https://en.wikipedia.org/wiki/Penryn_(microarchitecture)
176 case CPUID(0x06, 0x1A):
177 case CPUID(0x06, 0x1E):
178 case CPUID(0x06, 0x1F):
179 case CPUID(0x06, 0x2E):
180 // https://en.wikipedia.org/wiki/Nehalem_(microarchitecture)
182 case CPUID(0x06, 0x25):
183 case CPUID(0x06, 0x2C):
184 case CPUID(0x06, 0x2F):
185 // https://en.wikipedia.org/wiki/Westmere_(microarchitecture)
187 case CPUID(0x06, 0x2A):
188 case CPUID(0x06, 0x2D):
189 // https://en.wikipedia.org/wiki/Sandy_Bridge#Models_and_steppings
191 case CPUID(0x06, 0x3A):
192 case CPUID(0x06, 0x3E):
193 // https://en.wikipedia.org/wiki/Ivy_Bridge_(microarchitecture)#Models_and_steppings
195 case CPUID(0x06, 0x3C):
196 case CPUID(0x06, 0x3F):
197 case CPUID(0x06, 0x45):
198 case CPUID(0x06, 0x46):
199 // https://en.wikipedia.org/wiki/Haswell_(microarchitecture)
201 case CPUID(0x06, 0x3D):
202 case CPUID(0x06, 0x47):
203 case CPUID(0x06, 0x4F):
204 case CPUID(0x06, 0x56):
205 // https://en.wikipedia.org/wiki/Broadwell_(microarchitecture)
207 case CPUID(0x06, 0x4E):
208 case CPUID(0x06, 0x55):
209 case CPUID(0x06, 0x5E):
210 // https://en.wikipedia.org/wiki/Skylake_(microarchitecture)
212 case CPUID(0x06, 0x8E):
213 case CPUID(0x06, 0x9E):
214 // https://en.wikipedia.org/wiki/Kaby_Lake
220 if (memcmp(info->vendor, "AuthenticAMD", sizeof(info->vendor)) == 0) {
221 switch (info->family) {
222 // https://en.wikipedia.org/wiki/List_of_AMD_CPU_microarchitectures
230 return AMD_BULLDOZER;
242 static void SetString(const uint32_t max_cpuid_ext_leaf, const uint32_t leaf_id,
244 const Leaf leaf = SafeCpuId(max_cpuid_ext_leaf, leaf_id);
245 // We allow calling memcpy from SetString which is only called when requesting
247 memcpy(buffer, &leaf, sizeof(Leaf));
250 void FillX86BrandString(char brand_string[49]) {
251 const Leaf leaf_ext_0 = CpuId(0x80000000);
252 const uint32_t max_cpuid_leaf_ext = leaf_ext_0.eax;
253 SetString(max_cpuid_leaf_ext, 0x80000002, brand_string);
254 SetString(max_cpuid_leaf_ext, 0x80000003, brand_string + 16);
255 SetString(max_cpuid_leaf_ext, 0x80000004, brand_string + 32);
256 brand_string[48] = '\0';
259 ////////////////////////////////////////////////////////////////////////////////
260 // Introspection functions
262 int GetX86FeaturesEnumValue(const X86Features* features,
263 X86FeaturesEnum value) {
266 return features->aes;
268 return features->erms;
270 return features->f16c;
272 return features->fma3;
274 return features->vpclmulqdq;
276 return features->bmi1;
278 return features->bmi2;
280 return features->ssse3;
282 return features->sse4_1;
284 return features->sse4_2;
286 return features->avx;
288 return features->avx2;
290 return features->avx512f;
292 return features->avx512cd;
294 return features->avx512er;
296 return features->avx512pf;
298 return features->avx512bw;
300 return features->avx512dq;
302 return features->avx512vl;
304 return features->avx512ifma;
306 return features->avx512vbmi;
307 case X86_AVX512VBMI2:
308 return features->avx512vbmi2;
310 return features->avx512vnni;
311 case X86_AVX512BITALG:
312 return features->avx512bitalg;
313 case X86_AVX512VPOPCNTDQ:
314 return features->avx512vpopcntdq;
315 case X86_AVX512_4VNNIW:
316 return features->avx512_4vnniw;
317 case X86_AVX512_4VBMI2:
318 return features->avx512_4vbmi2;
320 return features->smx;
322 return features->sgx;
324 return features->cx16;
331 const char* GetX86FeaturesEnumName(X86FeaturesEnum value) {
375 case X86_AVX512VBMI2:
376 return "avx512vbmi2";
379 case X86_AVX512BITALG:
380 return "avx512bitalg";
381 case X86_AVX512VPOPCNTDQ:
382 return "avx512vpopcntdq";
383 case X86_AVX512_4VNNIW:
384 return "avx512_4vnniw";
385 case X86_AVX512_4VBMI2:
386 return "avx512_4vbmi2";
396 return "unknown_feature";
399 const char* GetX86MicroarchitectureName(X86Microarchitecture uarch) {
402 return "X86_UNKNOWN";
410 return "INTEL_ATOM_BNL";
418 return "INTEL_ATOM_SMT";
426 return "INTEL_ATOM_GMT";
440 return "AMD_BULLDOZER";
446 return "unknown microarchitecture";