Previously, we relied on the '$<' Makefile automatic variable to
determine the directory where a certain build target should run.
Although this worked for a single container (as '$<' expands to
the *first* dependency of the make target), it causes issues when
multiple subdirectories are present, since all but the first
target will have '$<' pointing to the same first subdirectory.
Instead, switch to using '$@' which always expands to the current
make target and perform some simple string manipulation to extract
the proper target directory where the build should occur.
JIRA: VAL-27
Signed-off-by: Alexandru Avadanii <Alexandru.Avadanii@enea.com>
Change-Id: Id8448c6feffb04dc14c8cd1c3d362f1d2934fd24
$(MAKE) -C $@
.PHONY: $(SUBDIRS_BUILD)
-$(SUBDIRS_BUILD): $(SUBDIRS)
- $(MAKE) -C $< build
+$(SUBDIRS_BUILD):
+ $(MAKE) -C $(@:-build=) build
.PHONY: $(SUBDIRS_PUSH)
-$(SUBDIRS_PUSH): $(SUBDIRS)
- $(MAKE) -C $< .push_image
+$(SUBDIRS_PUSH):
+ $(MAKE) -C $(@:-push=) .push_image
include build.mk